This application claims the benefit of Korean Patent Application No. 10-2004-0072471, filed on Sep. 10, 2004, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a semiconductor package, and more particularly, to a stacked board-on-chip (BOC) package having a mirroring structure and a dual inline memory module (DIMM) on which the stacked BOC packages are mounted.
2. Description of the Related Art
The trend in the semiconductor industry is to make semiconductor products compact, thin, light, highly integrated, and highly densified. This trend is also applied to dual inline memory modules (hereinafter, referred to as DIMMs) on each of which semiconductor memory devices are mounted. Board-on-chip (BOC) packages are well known and used for, for example, high-speed dynamic random access memory (DRAM) or the like. Stacked BOC packages have been recognized as convenient and suitable for constructing a high-speed, high-capacity DIMM.
FIG. 1 illustrates a conventional stacked BOC package 100. In the conventional stacked BOC package 100, a first substrate 110 having a cavity 113 in the center is attached to a first semiconductor chip 111, and contact pads 112 of the first semiconductor chip 111 are bonded to electrode pads 115 of the first substrate 110 via a wire 114. Similarly, electrode pads 125 of a second substrate 120 are bonded to contact pads 122 of a second semiconductor chip 121 via a wire 124. The electrode pads 115 of the first substrate 110 are connected to electrode pads 126 on an upper surface of the second substrate 120 via solder bumps 130. The electrode pads 126 on the upper surface of the second substrate 120 are connected to the electrode pads 125 on a lower surface of the second substrate 120 through via holes 127, which are filled with metal. The electrode pads 125 on the lower surface of the second substrate 120 are attached to solder bolls 140.
In the conventional stacked BOC package 100 signal line load increases with an increase of a package parasitic component caused by the stacked structure. When DIMMs are constructed with a conventional stacked BOC package 100, signal fidelity cannot be ensured because of the increased load of the signal line. The height of the solder bumps 130 restricts installation or wiring of components in the DIMM. Hence, it is not easy to apply an optimal topology to the DIMM. The DIMM stub is elongated due to the solder bumps 130, so a signal transmitted to a corresponding solder bump 130 is reflected, thus reducing signal fidelity.
In addition, when the conventional stacked BOC package 100 is used to construct a DIMM, a separate stacked BOC package must be manufactured so that pin arrangements on both surfaces of the DIMM are mirrored by each other. Developing an extra package increases costs.
There remains a need for a stacked BOC package having a ball pad structure in which mirroring is achieved and a DIMM with a short stub that results from mounting the stacked BOC package thereon.